Method of driving LCD

ABSTRACT

In order to perform a multi-gradation display of high quality on a liquid crystal panel (6) by a small-scale A/D converter (1), a 4 - bit A/D converter (1) is equipped with four reference potential couples for performing the dither method using arbitrary two reference potential couples in each of two fields to display a signal at a first pixel. Likewise the remaining two reference potential couples are used for the dither method to display the signal at a second pixel adjacent thereto. In this way, the dither method is applied to adjacent pixels using different reference potential couples to generate an area gradation, so that it is possible to represent 64 gradations owing to the multiple effect of the dither method and the dot area modulation method. Moreover, it is possible to obtain a display of high quality which is free from flicker disturbance since the dither cycle is 1/30 second.

TECHNICAL FIELD

The present invention relates to a method of driving an LCD (liquidcrystal display) which performs multi-gradation display, more in detail,to a method of driving an LCD which performs multi-gradation displaybased on an image information quantized by an A/D converter(analog-digital converter).

BACKGROUND TECHNOLOGY

Recently a digital signal processing has been generally applied to animage display. For example, when the analog signal of TV, etc. issubjected to an A/D conversion, there appears a false outline of adisplayed image since the continuity of gradation is lost (quantizationnoise). Many liquid crystal TVs which employ LCDs as display elementsalso use A/D converters. Passive matrix panels for displaying movingpictures generally employ a method of subjecting a luminance signal toA/D conversion and thereafter converting the resulting digital signalinto a pulse width, and it is known that active matrix panels employingMIM elements can also use a similar method (e.g., refer to JapanesePatent Publication No. 63 - 6855).

Many liquid crystal TVs employ a 4 - bit A/D converter for the purposeof miniaturization or securing portability. The number of gradationswhich can be displayed by 4 - bit data, however, is as few as 16, sothat quantization noise is conspicuous.

FIG. 16 is a block diagram exemplifying a system for improving imagequality using a dither method. In the system, a TV signal is input tothe input terminal IN of a 4 - bit A/D converter 1, which supplies anA/D converted 4 - bit data to a memory 21 in a signal electrode drivingcircuit 2.

A multiplexer 3 comprises an upper switch 31 for switching to the upperreference potentials Vt1 or Vt2 and a lower switch 32 for switching tothe lower reference potentials Vb1 or Vb2 at the input sides thereof,the switches 31 and 32 being coupled to the upper reference potentialinput terminal Vrt and the lower reference potential input terminal Vrbof the 4 - bit A/D converter 1 respectively at the output sides thereof.

A clock φ1 produced by a controller 4 is supplied to the multiplexer 3for controlling the switches 31 and 32 in liaison with each other.

The controller 4 also supplies a signal group φ4 including a startsignal for timing the start of scanning, a clock for timing thesuccessive shift of a selected pulse, etc. to a scanning electrodedriving circuit 5.

Moreover, the A/D converter 1 and the signal electrode driving circuit 2receive a signal group φ3 which is formed mainly on the basis of ahorizontal synchronous signal, including a (data sampling clock, a shiftclock which forms addresses in the memory 21, a latch clock whichtransfers data within the memory 21, a signal for timing a pulse widthmodulation, etc.

The signal electrode driving circuit 2 comprising the memory 21 and apulse width modulation circuit 22 is coupled to each signal electrode ofa liquid crystal panel 6 at each output terminal thereof and a scanningelectrode driving circuit 5 is coupled to each scanning electrode of theliquid crystal panel 6 at each out put terminal thereof.

In FIG. 16, the memory 21 transfers all the data to the pulse widthmodulation circuit 22 after completion of successively reading the 4 -bit data in a cycle of horizontal scanning.

In a display method employing a common line sequential scanning, the A/Dconverter 1 quantizes a TV signal into 4 - bit data during a firsthorizontal scanning period and successively stores the same in memory21. During a second horizontal scanning period, at first the data readby the latch clock of the clock group φ3 of the controller 4 istransferred to the pulse width modulation circuit 22.

The pulse width modulation circuit 22 subjects the transferred data topulse width modulation and supplies the same to the signal electrodes ofthe liquid crystal panel 6. At that time, the scanning electrode drivingcircuit 5 supplies selective potentials to corresponding electrodes soas to apply a gradation driving signal to desired pixels together withthe waveform produced by the signal electrode driving circuit 2.

Keeping pace therewith, the TV signal during a second horizontalscanning period is quantized into 4 - bit date, which is successivelystored in the memory 21. Similarly, the application and sampling of thegradation driving signal are performed at desired pixels during a thirdhorizontal scanning period. A picture is displayed by repeating thisprocess over the entire frame.

A display of 32 gradations according to the dither method in such asystem will be described hereinafter. It is supposed that the TV signalinputted to the A/D converter 1 is a raster signal having a uniformluminance and the liquid crystal panel 6 has 240 scanning electrodes forNTSC color system TV display.

Furthermore, the potentials Vt1, Vt2, Vb1 and Vb2 are supposed to havethe following relations therebetween: Vt1<Vt2, Vb1<Vb2

The dither method is a method for displaying gradation by way of aplurality of fields, but the vertical resolution of an image is reducedto a half therein.

In the dither method employing two fields, at first in the first fieldthe raster signal is converted to nth gradation using the referencepotential couple Vt1 and Vb1 for an A/D conversion, and the resultingpotential is applied to pixels.

Next in the second field, the reference potential couple is changed toVt2 and Vb2 and the A/D converter 1 converts the raster signal to thenth or (n-1)th gradation based on the pulse-height difference. When theyare converted to the nth gradation in both of the first and secondfields, they are recognized as the nth gradation by sight.

On the other hand, when it is converted into the nth gradation in thefirst field while the (n-1)th gradation in the second field, they areleveled to be recognized as (n-0.5)th gradation by sight. In this way itis possible to display brightness by 0.5 gradation so as to enable a 32gradation display using the 4 - bit A/D converter 1.

Supposing that the scanning period of a field is 1/60 second, thescanning period of the dither method comprising the two fields becomes1/30 second so that there occurs no flicker. The dither method can bealso explained on the basis of the responsibility of liquid crystal.

Other methods for gradation display using the binary display liquidcrystal panel include a time sharing method and a dot area modulationmethod. The time sharing method adjusts the average amount oftransmitting light by making the time ratio of the transparent state(hereinafter referred to as ON) and the opaque state (hereinafterreferred to as OFF) of a pixel correspond to the display gradation. Thedot area modulation method divides the pixel into sub-pixels in such away as to make the area ratio of the ON-state sub-pixels and theOFF-state sub-pixels correspond to the gradation for making use of thespacial leveling effect of sight.

However, various problems are present in the prior art set forth above.The LCD of active matrix driving method employing MIM elements etc. hashigh contrast which is almost equal to that of CRT. Since in case of CRTthe image quality of 64 gradation display is defined as a level whereinthe obstruction is recognizable but ignorable, the lowest standard ofimage quality should be set at the 64 gradation display also in case ofthe LCD.

In order to realize the 64 gradation display by the pulse widthmodulation alone, it is enough to subject the signal to a 6 - bit dataprocessing using a 6 - bit A/D converter. However, when the number ofbits of the A/D converter is increased by 1, the number of comparatorsis doubled and the size of the memory used in the driver portion is alsodoubled, which causes a problem of an enlarged circuit and high cost.

In order to display brightness at 64 gradations according to the dithermethod using the 4 - bit A/D converter, it is sufficient to display fourpictures (four fields in case of TV) in a frame. Four sets of upper andlower reference potentials which are shifted from one another by 1/4 LSBare switched to one another in each picture.

Human eyes recognize brightness in time average when it varies with afrequency more than about 30 Hz, but they recognize the variation ofbrightness as a flicker when it varies with a frequency less than 30 Hz.

The inventor's experiment proved that when the four upper and lowerreference potential couples were switched to each field in displaying TVimage, a flicker of about 15 Hz appeared to obstruct the viewremarkably. When the multi-gradation display is performed by multiplyingthe dither method using the small-scale A/D converter in this way, thereoccurs a problem of generating the flicker difficulty.

Each pixel is divided into sub-pixels in order to perform themulti-gradation display according to the dot area modulation method. Asa least dividing method, for example, in case of a 16 gradation display,each pixel is divided into four sub-pixels, the dot area ratio of whichis 1:2:4:8, wherein transparent pixels and opaque pixels are selectedaccording to gradation data.

In order to display up to 64 gradations according to this method, eachpixel needs to be divided into 6 sub-pixels each of which is drivenunder independent control. Accordingly, the dot area modulation methodhas a problem in that the number of pixels has to be increased formulti-gradation display and consequently the number of control lines isalso increased.

It is the object of the present invention to solve the problems setforth above and to provide a method of driving an LCD for performingmulti-gradation display of high quality using a small-scale A/Dconverter.

SUMMARY OF THE INVENTION

In order to attain the above object according to an aspect of thepresent invention, a method of driving an LCD which is equipped with anA/D converter and a liquid crystal panel and which converts an imagedisplay signal into a quantized display data by the A/D converter setforth above according to reference potentials, applies signal electrodedriving signals to the signal electrodes of the liquid crystal panelbased on the display data and successively selects the scanningelectrodes of the liquid crystal panel so as to display the display dataon the liquid crystal panel comprises the steps of generating more thantwo reference potential groups which output a plurality of referencepotentials set forth above, wherein the reference potentials of eachreference potential group are set to be different from those of otherreference potential groups, selecting the reference potential groups ineach field at a given cycle, selecting the potential of the aboveselected reference potential group in each field at a given cycle ateach scanning electrode of the liquid crystal panel or at each samplingcycle of the A/D converter and subjecting the selected potential to anA/D conversion so as to display the display data on the liquid crystalpanel.

According to another aspect of the invention, the method may comprisethe steps of selecting the reference potential groups in each field at agiven cycle, selecting the potential of the selected reference potentialgroup at a given cycle at each sampling cycle of the A/D converterwithin the field, selecting the reference potential by shifting thesampling cycle from the corresponding reference potential by a cyclewith regard to each scanning electrode of the liquid crystal panel andsubjecting the selected reference potential to an A/D conversion so asto display the display data on the liquid crystal panel.

This method of driving LCD can display brightness at gradations thenumber of which is a product of that obtained by the resolution of theA/D converter and the number of reference potential groups by using thedither method. Moreover, supposing that A/D conversions are performed intwo pixels which are adjacent to each other based on different referencepotentials therein, it is possible to further double the number ofgradations by employing the dot area modulation method since theadjacent two pixels can be perceived in brightness by human eyes in anaverage.

That is, all in all, it is possible to display brightness at gradationsthe number of which is a product of that obtained by the resolution ofthe A/D converter, that effected by the dither method and that effectedby the dot area modulation method.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a block diagram of the invention,

FIG. 2 is the timing chart of a first field in FIG. 1,

FIG. 3 is the timing chart of a second field,

FIG. 4 is an enlarged view of the left upper corner of a liquid crystalpanel according to a first embodiment of the invention,

FIG. 5 is a view for explaining the relationship between referencepotentials and an input voltage according to the first embodiment,

FIG. 6 is enlarged views of pixels at the gradation display of the firstembodiment wherein (1), (2), (3) and (4) are enlarged views of pixels incase of pulse heights e1, e2, e3 and e4 respectively.

FIG. 7 is the timing chart of the first field according to a secondembodiment of the invention,

FIG. 8 is the timing chart of the second field according to the secondembodiment,

FIG. 9 is an enlarged view of the upper left corner of the liquidcrystal panel according to the second embodiment,

FIG. 10 is an enlarged view of pixels in case of a raster display ofuniform luminance according to the second embodiment, wherein (1), (2),(3) and (4) are enlarged views of pixels at pulse heights e1, e2, e3 ande4 respectively.

FIG. 11 is the timing chart of the first field according to a thirdembodiment of the invention,

FIG. 12 is the timing chart of a second field according to the thirdembodiment,

FIG. 13 is an enlarged view of the upper left corner of the liquidcrystal panel according to the third embodiment,

FIG. 14 is an enlarged view of pixels in case of a raster display ofuniform luminance according to the third embodiment, wherein (1), (2),(3) and (4) are enlarged views of pixels at pulse heights e1, e2, e3 ande4 respectively.

FIG. 15 is a view for explaining the relationship between the switchingpotentials and the pulse heights according to a fourth embodiment.

FIG. 16 is a block diagram exemplifying a system for improving thequality of picture according to the conventional dither method.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

The preferred embodiments of the invention will be described withreference to attached drawings in order to explain the invention more indetail.

First Embodiment: FIGS. 1 to 6

FIG. 1 is a block diagram of an LCD according to a first exemplaryembodiment of the invention wherein the same parts as illustrated inFIG. 16 are denoted at same numerals and the number of referencepotential couples of an A/D converter is supposed to be "2".

In FIG. 1, one (Vt1 in the figure) of the four upper referencepotentials Vt1 to Vt4 is inputted to the upper reference potential inputterminal Vrt of a 4 - bit A/D converter 1 by way of an input switch 13ain a multiplexer 13, while one (Vb1 in the figure) of the lowerreference potentials Vb1 to Vb4 is inputted to the lower referencepotential input terminal Vrb of the 4 - bit A/D converter 1 by way of aninput switch 13b in the multiplexer 13.

A TV signal is inputted in the input terminal IN of the A/D converter 1,the output data of which is supplied to a memory 21 in a signalelectrode driving circuit 2 by way of a data bus 7. The signal electrodedriving circuit 2 composed of the memory 21 and a pulse width modulator22 is coupled to each signal electrode of a crystal display panel 6 ateach output terminal thereof.

A controller 14 supplies clocks φ1 and φ2 to the multiplexer 13, asignal group φ3 to the A/D converter and the signal electrode drivingcircuit 2 and a signal group φ4 to a scanning electrode driving circuit5.

The upper and lower reference potentials Vt2 to Vt4 and Vb2 to Vb4 areset to be shifted from the preceding voltage in ascending order thereofstarting at the upper and lower reference potentials Vt1 and Vb1respectively by a fourth of the voltage resolution determined by theleast significant bit (referred to as "LSB" hereinafter) of the outputof the 4 - bit A/D converter. That is, the following equations areestablished.

    Vb2=Vb1+1/4LSB

    Vb3=Vb1+2/4LSB

    Vb4=Vb1+3/4LSB

    Vt2=Vt1+1/4LSB

    Vt3=Vt1+2/4LSB

    Vt4=Vt1+3/4LSB

At that time, the lower reference potential Vb1 is set to be the blacklevel of the TV signal, while the upper reference potential Vt4 is setto be the white level thereof. Each reference potential may be shiftedfrom the preceding voltage in descending order starting it Vt1 and Vb1.At that time the lower reference potential Vb1 is set to be the blacklevel while the upper reference potential Vt1 to the white level

Hereupon, the upper and lower reference potentials Vt1 and Vb1, Vt2 andVb2, Vt3 and Vb3 and Vt4 and Vb4, respectively, form reference potentialcouples, so that they will be denoted at reference potential couplesVt1-Vb1, Vt2-Vb2, Vt3-Vb3 and Vt4-Vb4 for the convenience of explanationhereinafter.

In the first field, 2 couples in the above reference potential couplegroup Vt1-Vb1, Vt2-Vb2, Vt3-Vb3 and Vt4-Vb4 are selected by themultiplexer 13 to be applied to the upper and looser reference potentialinput terminals Vrt and Vrb of the A/D converter 1. Likewise in thesecond field, the remaining two reference potential couples are selectedby the multiplexer 13 to be applied to the upper and lower referencepotential input terminals Vrt and Vrb of the A/D converter 1.

The TV signal of NTSC color system constitutes a frame by two fields andhas a frame cycle of 1/30 second. The reference potential couples forperforming the dither method are switched from one group to the otherevery 1/30 second if the dither method is performed in every field,which is not recognized as a flicker by human eyes.

Table 1 is a table for setting relations among the clocks φ1 and φ2, theupper and lower reference potentials Vt1, Vt2, Vt3, Vt4, Vb1, Vb2, Vb3and Vb4 and the upper and lower reference potential input terminals Vrtand Vrb which are supplied to the multiplexer 13 according to the firstembodiment.

When the clock φ1 is HIGH (denoted at "1" in the table 1) and the clockφ2 is LOW (denoted at "0" in the table 1), the upper and lower referencepotential input terminals Vrt and Vrb receive the upper and lowerreference potentials Vt1 and Vb1 respectively.

Likewise, the Vrt and Vrb receive the Vt3 and Vb3 respectively When bothof the clocks φ1 and φ2 are HIGH, receive the Vt4 and Vb4 respectivelywhen both of the clocks φ1 and φ2 are LOW "0" and receive the Vt2 andVb2 respectively when the clock φ1 is LOW "0" and the clock φ2 is HIGH"1".

Table 2 shows reference potential couples corresponding to pixels A andB when the embodiment employs the dither method. The pixels A and B arepixels which are adjacent to each other and different from each other inthe scanning electrode thereof. A signal to be displayed at the pixel Ais subjected to an A/D conversion by the reference potential couplesVt1-Vt1 and Vt4-Vt4 in the first and second field respectively.Likewise, A signal to be displayed at the pixel B which is the secondpixel is subjected to an A/D conversion by the reference potentialcouples Vt3-Vb3 and Vt2-Vb2 in the first and second field respectively.

The timing charts of the LCD driving method according to the firstembodiment are shown in FIGS. 2 and 3, wherein FIG. 2 is the timingchart of a TV signal in the first field.

In FIG. 2, denoted at AIN in (A) is a TV signal supplied to the A/Dconverter 1, wherein the components of signal displayed by the pixels onthe first, second, third and fourth scanning electrodes which arecounted from top to down of the liquid crystal panel 6 are denoted atencircled numerals 1, 2, 3 and 4.

(B) shows the clock φ1 which goes HIGH in the first field, (C) shows theclock φ2 which switches to LOW or HIGH in case of the odd-numbered oreven-numbered scanning signals respectively and (D) shows a samplingclock φ3a of the A/D converter 1 exemplified in the signal group φ3.

(E) shows the potential of the upper reference potential input terminalVrt of the A/D converter 1 which is one of the upper referencepotentials Vt1 to Vt4 inputted by way of the multiplexer 13.

(F) shows the potential of the lower reference potential input terminalVrb of the A/D converter 1 which is one of the lower referencepotentials Vb1 to Vb4 inputted by way of the multiplexer 13.

The sampling clock φ3a shown in (D) has nothing with the actual timingof the embodiment but simply represents the mutual relations amongsignals. It represents a simplified model of 10 time sampling in ahorizontal scanning period instead of a several hundred time practicalsampling therein.

In FIG. 2, the clock φ1 in the first field is HIGH "1" while the clockφ2 is LOW "0" during the odd-numbered scanning periods 1 and 3.According to table 2, the upper and lower reference potentials Vt1 andVb1 are supplied to the upper and lower reference potential inputterminals Vrt and Vrb by way of the switches 13a and 13b in themultiplexer 13 respectively.

Accordingly, the TV signal is subjected to an A/D conversion by way of areference potential couple of the upper and lower reference potentialsVt1 and Vb1 during the odd-numbered scanning periods 1 and 3 of thefirst field.

Next, the clock φ2 is switched from LOW to HIGH in logical value duringthe even-numbered scanning periods 2 and 4 of the first field, so thatthe switches 13a and 13b are operated according to table 2 so as toapply the upper and lower reference potentials Vt3 and Vb3 to the upperand lower reference potential input terminals Vrt and Vrb respectively.

In this way, the data which have teen subjected to an A/D conversion bythe reference potential couples Vt1-Vb1 and Vt3-Vb3 are displayed by thepixel groups on the odd-numbered and even-numbered scanning electrodesrespectively in the first field.

FIG. 3 is a timing chart of the TV signal in the second field, whereinthe numerals are the same as those in FIG. 2.

In FIG. 3, (A) shows the TV signal AIN, wherein the components of signaldisplayed by the pixels on the first, second, third and fourth scanningelectrodes which are counted from top to down of the liquid crystalpanel 6 are denoted at encircled numerals 1, 2, 3 and 4.

(B) shows a clock φ1 which goes HIGH in logical value in the secondfield, (C) shows a clock φ2, (D) shows a sampling clock φ3a, (E) showsthe potential of the upper reference potential input terminal Vrt and(F) shows the potential of the lower reference potential input terminalVrb.

Although (C) and (D) are the same as in FIG. 2, (E) and (F) aredifferent from those in FIG. 2 not only in phase bit also in potential,i.e., the potentials in (E) and (F) are Vt4 and Vb4 at HIGH level andVt2 and Vb2 at LOW level respectively.

In FIG. 3, the clock φ1 in the second field is LOW "0" and the clock φ2is LOW "0" during the odd-numbered scanning periods 1 and 3, so that theupper and lower reference potentials Vt4 and Vb4 are applied to theupper and lower reference potential input terminals Vrt and Vrb of theA/D converter 1 respectively according to table 2 by way of the switches13a and 13b in the multiplexer 13.

Accordingly, the TV signal is subjected to an A/D conversion using thereference potential couple of the upper and lower reference potentialsVt4 and Vb4 during the odd-numbered scanning periods 1 and 3 of thesecond field.

Next, the clock φ2 is switched from LOW to HIGH in logical value duringthe even-numbered scanning periods 2 and 4 of the second field, so thatthe switches 13a and 13b in the multiplexer 13 are switched according totable 2 in such a way as to apply the upper and lower referencepotentials Vt2 and Vb2 to the upper and lower reference potential inputterminals Vrt and Vrb of the A/D converter 1 respectively. In this way,the data which have teen subjected to an A/D conversion by the referencepotential couples Vt4-Vb4 and Vt2-Vb2 are displayed by the pixel groupson the odd-numbered and even-numbered scanning electrodes respectivelyin the second field.

FIG. 4 is an enlarged view of the upper left corner of the liquidcrystal panel 6 according to the first embodiment. Since pixel 601 whichis selected as a first pixel on an odd-numbered scanning electrode isdisplayed using the reference potential couples Vt1-Vb1 and Vt4-Vb4 inthe first and second fields and the dither method of two-field cycle, itcorresponds to pixel A in table 2.

On the other hand, since pixel 602 which is selected as a second pixelon an even-numbered scanning electrode is displayed using the referencepotential couples Vt3-Vb3 and Vt2-Vb2 and the dither method of two-fieldcycle, it corresponds to pixel B in table 2. These are denoted at A andB in each pixel.

Since different reference potential couples perform an A/D conversionwith regard to each horizontal scanning period in this embodiment,pixels A and B each of which is respectively aligned horizontally andwhich are adjacent to each other generate a dot area modulation displayeffect vertically. This effect will be described hereinafter more indetail with reference to FIGS. 5 to 8.

FIG. 5 is a view for explaining the relationship between comparisonpotentials determined by the upper and lower reference potentialsVt1-Vt4 and Vb1-Vb4 and the inputted TV signal voltage. The A/Dconverter 1 of this embodiment determines the comparison potentials bydividing the voltage between the upper and lower reference potentialsinto 14 equal parts to quantize the TV signal thereby.

In FIG. 5, when the TV signal is quantized by the reference potentialcouple of the upper and lower reference potentials Vt1 and Vb1, thepotential level (comparison potential) corresponding to the borderbetween the sixth gradation (0110) and the seventh gradation (0111) isdenoted at a1 and likewise that corresponding to the border between theseventh and eighth gradations is denoted at b1.

The comparison potential a1 for the sixth gradation is the sixthpotential of the potentials determined by dividing the voltage betweenthe potentials of the reference potential couple into 14 equal parts asthey are counted from bottom to top. Likewise, the comparison potentialsat the borders between the sixth and seventh gradations when the TVsignal is quantized by the upper and lower reference potentials Vt2 andVb2, Vt3 and Vb3 and Vt4 and Vb4 are denoted at a2, a3 and a4respectively.

Since Vt1<Vt2<Vt3<Vt4 and Vb1<Vb2<Vb3<Vb4 are established with regard tothe upper and lower reference potentials respectively, a1<a2<a3<a4<b1 isestablished. It is supposed that a1<e1<a2<e2<a3<e3<a4<e4<b1 isestablished among the a1, a2, a3 and a4 and the pulse heights e1, e2, e3and e4 of the inputted TV signal.

The gradations in case a raster signal having a given luminance e1 isinputted under such a condition will be described with reference to FIG.5.

A signal displayed at pixel A on an odd-numbered scanning electrode inthe first field is represented at 7th gradation (0111) since the signalis quantized using the adjacent comparison potential a1 and the pulseheight e1 is higher than the comparison potential a1.

A signal which is displayed on an odd-numbered scanning electrode in thesecond field is represented at 6th gradation (0110) since it isquantized using the comparison potential a4 therein and the pulse heighte1 thereof is lower than the a4.

Next, a signal which is displayed at pixel B on an even-numberedscanning electrode in the first field is represented at 6th gradationsince it is quantized by the comparison potential a3 and the pulseheight e1 thereof is lower than the a3. Likewise, since a signal havingthe pulse height e1 is quantized by the comparison potential a2 in thesecond field and the pulse height e1 is lower than the a2, it isrepresented at 6th gradation.

This result and the results of similar consideration with regard topulse heights e2, e3 and e4 are shown together in table 3. In the table,"e" is the pulse height of a raster signal, "1F" is the gradation of thefirst field, "2F" is the gradation of the second field, "dither" is agradation as a result of the dither method alone and "area gradation" isa gradation summing up those effected by the dot area modulation methodaccording to the invention.

In case of the pulse height e1, a pixel (denoted at A) on anodd-numbered scanning line represents it at 7th gradation (7 in table 3)in the first field, while at 6th gradation (6 in table 3) in the secondfield.

A signal at A is recognized to be displayed at brightness correspondingto 6.5th gradation by human eyes owing to the characteristics thereofthat the brightness of a pixel is recognized by human eyes in a timeaverage (It is written in the column of dither in table 3).

On the other hand, a signal that is displayed at a pixel on aneven-numbered scanning line is of 6th gradation in both of the first andsecond fields, so that the time average of the gradation thereof is alsothe 6th gradation (It is written in the column of dither in table 3).

Likewise, in case of the pulse height of e1, the TV signal has atwo-field cycle (1 frame cycle) of 1/30 second at odd-numbered scanningelectrodes, so that the variation of brightness is not recognized as aflicker by human eyes. Adjacent pixels A and B represent the pulseheight at 6.5th and 6th gradations respectively, which are averaged tobe 6.25th gradation by human eyes in a small area (It is written in thecolumn of "area gradation" in table 3).

Likewise, in case of the pulse height of e2, pixel A represents it at7th and 7th gradations in the first and second fields respectively.Pixel B represents it at 6th and 7th gradations in the first and secondfields respectively. When the pulse height is subjected to the dithermethod, both of the pixels A and B represent it at 6.5th gradation sothat the area gradations thereof become also the 6.5th gradation.

In case of the pulse height of e3, pixel A represents it at 7th and 6thgradations in the first and second fields respectively while pixel Brepresents it at 7th and 7th gradations in the first and second fieldsrespectively. When the pulse height is subjected to the dither method,the pixel A and pixel B represent it at 6.5th and 7th gradationsrespectively, so that the area gradation thereof becomes 6.75thgradation.

In case of the pulse height of e4, pixels A and B represent it at 7thand 7th gradations in the first and second fields respectively. When thepulse height is subjected to the dither method, the pixels A and Brepresent it at 7th gradation, so that the area gradation thereofbecomes the 7th gradation.

FIG. 6 is an enlarged view of pixels which displays the content of table3. In FIG. 6, (1), (2), (3) and (4) show the state of display in case ofthe pulse heights of e1, e2, e3 and e4, corresponding to the e1, e2, e3and e4 in table 3 respectively.

In FIG. 6 (1), the pixel 601 on an odd-numbered scanning line representsthe pulse height at 6.5th gradation corresponding to the e1 in table 3while the pixel 602 on an even-numbered scanning line represents it at6.0th gradation, these gradations being written in the pixels 601 and602. The pixel couple 901 that is surrounded by a dot line in the figureis composed of the pixel 601 on the odd-numbered scanning line and pixel602 on the even-numbered scanning line, the pixels being adjacent toeach other.

As described above, human eyes have a characteristic that they spaciallyaverage adjacent pixels in brightness in sight so long as the differencetherebetween is ignorable relative to the resolution of sight.

The pixels 601 and 602 of the pixel couple 901 are also averaged inbrightness in sight owing to a gradation display method (the dot areamodulation method) that takes advantage of this characteristic, so thatthe pixel couple is spacially averaged in brightness to be of 6.25thgradation since the pixel 601 is of 6.5th gradation and pixel 602 is of6.0th gradation.

Likewise in FIG. 6 (2), all pixels represent the pulse height at 6.5thgradation so that the area gradation thereof is also the 6.5th gradationand in FIG. 6 (3), pixels 601 on the odd-numbered scanning electrodesrepresent it at 6.5th gradation while pixels 602 on the even-numberedscanning electrodes represent it at 7.0th gradation so that the areagradation of the pixel couples 901 is 6.75th graduation. In FIG. 6 (4),all pixels represent it at 7.0th gradation so that the area gradationthereof is 7.0th gradation.

As described above, according to the invention which combines the dithermethod and the dot area modulation method, it is possible to identifypulse heights e1, e2, e3 and e4 from one another by sight, all of whichwere represented at 7th gradation and therefore could not be identifiedfrom one another according to conventional methods of display.

Moreover, it is free from flicker disturbance owing to the dither methodof 30 Hz and can obtain a spacially smooth picture since it employs thedot area modulation method wherein adjacent pixels can be identifiedfrom each other in brightness by 0.5 gradation.

In other words, three new gradation levels 6.25, 6.5 and 6.75 aregenerated between the 6th gradation (0110) and the 7th gradation (0111),realizing 64 gradations in all, i.e., four times as many as 16gradations that can be realized by the 4 - bit A/D converter.

Different from such a raster signal, actual TV signals vary in time aswell as in space, but this method generates little display errors sincethere is little difference in luminance between points which are closeto each other in time and space.

Even if the difference is large, the order of display error generated bythis method is small within a gradation and therefore is not soconspicuous.

This first embodiment employs a reference potential couple Vt1-Vb1 andVt4-Vb4 for pixel A and a reference potential couple Vt3-Vb3 and Vt2-Vb2for pixel B for use in the dither method.

However, a similar effect can be also obtained by repeating the aboveconsideration with reference to FIGS. 5 and 6 employing a referencepotential couple Vt1-Vb1 and Vt2-Vb2 for pixel A and a referencepotential couple Vt3-Vb3 and Vt4-Vb4 for pixel B. Likewise a similareffect can be also obtained by employing a reference potential coupleVt1-Vb1 and Vt3-Vb3 for pixel A and a reference potential couple Vt2-Vb2and Vt4-Vb4 for pixel B.

Second Embodiment: FIGS. 7 to 13

The first embodiment selects adjacent pixels vertically (in thedirection of adjacent scanning electrodes) for the dot area modulationmethod. A second embodiment which selects adjacent pixels horizontally(in the direction of adjacent signal electrodes) will be described withreference to FIGS. 7 to 13 hereinafter.

FIGS. 7 and 8 are timing charts for explaining the operation of thesecond embodiment, wherein (A) to (F) respectively correspond to (A) to(F) in FIGS. 2 and 3. The system employed in this embodiment is commonto that of the first embodiment illustrated in FIG. 1.

In FIG. 7 (C), the clock φ2 for switching multiplexer 13 goes LOW andHIGH in accordance with the sampling clock of the A/D converter 1illustrated in (D).

Likewise in FIG. 8 (C), the clock φ2 in the second field also goes LOWand HIGH in accordance with the sampling clock φ3a illustrated in (D).

In the first field, the clock φ1 is HIGH, so that the upper referencepotentials Vt1 and Vt3 are alternately inputted in the upper referencepotential input terminal Vrt at each data sampling of the A/D converter1 as illustrated in (E) according to table 2 and the lower referencepotentials Vb1 and Vb3 are alternately inputted in the lower referencepotential input terminal Vrb as illustrated in (F) at each datasampling.

In the second field, the clock φ1 inputted in the multiplexer 104 isLOW, so that the upper reference potentials Vt2 and Vt4 and the lowerreference potentials Vb2 and Vb4 are alternately inputted in the upperand lower reference potential input terminals Vrt and Vrb as illustratedin (E) and (F) respectively.

According to this embodiment, the data displayed at a pixel on anodd-numbered signal electrode is subjected to an A/D conversion by wayof a reference potential couple of the upper reference potential Vt1 andthe lower reference potential Vb2 in the first field while by way of areference potential couple of the upper reference potential Vt4 and thelower reference potential Vb4 in the second field, so that the pixelbecomes the pixel A in table 3.

Likewise, the data displayed at a pixel on an even-numbered signalelectrode is subjected to an A/D conversion by way of a referencepotential couple of the upper reference potential Vt3 and the lowerreference potential Vb3 in the first field while by way of a referencepotential couple of the upper reference potential Vt2 and the lowerreference potential Vb2 in the second field, so that the pixel becomesthe pixel B in table 3.

FIG. 9 shows an array of the pixels A and B set forth above. FIG. 9 isan enlarged view of the upper left corner of the liquid crystal panel 6which performs display according to the dither method of the secondembodiment, wherein pixel 1201 on an odd-numbered signal electrode ispixel A and pixel 1202 on an even-numbered signal electrode is pixel B.The types of pixels A and B are written in each pixel.

As illustrated in FIG. 9, pixels A and B are aligned in columnrespectively and are adjacent to each other in row.

A display obtained by the second embodiment is shown in FIG. 10. FIG. 10is an enlarged view of pixels which represent the pulse heights e1 to e4in FIG. 5, wherein (1), (2), (3) and (4) display the states of pixels incase of the pulse heights e1, e2, e3 and e4 respectively.

The display state of pixels A and B is common to that of the firstembodiment in case of the e1, e2, e3 and e4 in table 3.

In FIG. 10 (1), the pixel 1201 on an odd-numbered signal electroderepresents 6.5th gradation since it is pixel A, while the pixel 1202represents 6.0th gradation since it is pixel B these A and B beingwritten in the pixels. In the figure, the pixel couple 1301 which issurrounded by a dot line is composed of the pixel 1201 on theodd-numbered signal electrode and the pixel 1202 on the even-numberedsignal electrode, these pixels being adjacent to each other.

Similarly to the first embodiment, the gradation of the pixel couple1301 becomes the average of those of the pixels 1201 and 1202, i.e.,6.25th gradation according to the dot area modulation method. In case of(2), all pixels are of 6.5th gradation, so that the area gradationthereof is the 6.5th gradation. In case of (3), the pixel 1201 on anodd-numbered signal electrode represents 6.5th gradation and the pixel1202 on an even-numbered signal electrode represents 7.0th gradation, sothat the area gradation thereof is 6.75th gradation. In case of (4), allpixels represent 7.0th gradation, so that the area gradation thereof isalso 7.0th gradation.

Third Embodiment: FIGS. 11 to 14

In the first and second embodiments set forth above, adjacent pixelswhich are different from one another in gradation are aligned verticallyand horizontally respectively. When a liquid crystal projector etc.performs an enlarged display, sometimes vertical or horizontal stripesof bright and dark having the difference of 0.5 gradation in brightnessare observed.

As a countermeasure, a third embodiment which takes advantage of thecharacteristic of eyesight that it is less sensitive to a skew patternwill be described with reference to FIGS. 11 to 14. In FIGS. 11 and 12,(A) to (F) respectively correspond to (A) to (F) in FIGS. 2 and 3, whichshow the timing charts according to the first and second embodimentsrespectively, FIG. 7 and FIG. 8.

In FIGS. 11 and 12, the clock φ2 of the multiplexer 13 and the waveformsof the upper and lower reference potential input terminals Vrt and Vrbare different from those of the first and second embodiments, but thecontrolling relation between the clocks φ1 and φ2 and the upper andlower reference potential input terminals Vrt and Vrb is supposed to bethe same as in the first and second embodiments as shown in table 1.

The clock φ2 shown in FIG. 11 (C) is reversed in logic value at eachsampling clock φ3a of the A/D converter 1 and moreover at eachhorizontal synchronous signal of the inputted TV signal too.

As a result, the clock φ2 goes LOW when a signal displayed by a pixellocated at the intersection of an odd-numbered scanning electrode and anodd-numbered signal electrode is subjected to an A/D conversion, so thatthe upper and lower reference potentials Vt1 and Vb1 are inputted in theupper and lower reference potential input terminals Vrt and Vrb in thefirst field (FIG. 11 (E) and FIG. 11 (F)), while the upper and lowerreference potentials Vt4 and Vb4 are inputted in the upper and lowerreference potential input terminals Vrt and Vrb (FIG. 11 (E) and FIG. 11(F)), which results in the pixel A in FIG. 13.

Likewise, the clock φ2 also goes LOW when a signal displayed by a pixellocated at the intersection of an even-numbered scanning electrode andan even-numbered signal electrode is subjected to an A/D conversion,which result in pixel A.

On the contrary, when a signal displayed by a pixel located at theintersection of an odd-numbered scanning electrode and an even-numberedsignal electrode is subjected to an A/D conversion, the clock φ2 isHIGH, which results in pixel B. Likewise a pixel at the intersection ofan even-numbered scanning electrode and an odd-numbered signal electrodeis pixel B.

FIG. 13 shows an array of the pixels A and B set forth above. FIG. 13 isan enlarged view of a liquid crystal panel for display according to thedither method of the third embodiment, wherein

pixel 1601 at the intersection of an odd-numbered scanning electrode andan odd-numbered signal electrode is pixel A;

pixel 1602 at the intersection of an odd-numbered scanning electrode andan even-numbered signal electrode is pixel B;

pixel 1603 at the intersection of an even-numbered scanning electrodeand an odd-numbered signal electrode is pixel B; and

pixel 1604 at the intersection of an even-numbered scanning electrodeand an even-numbered signal electrode is pixel A. The pixel types A andB are written in the pixels. Accordingly, the pixels A and B arearranged askew.

FIG. 14 is an enlarged view of pixels which display an example of TVsignal having the pulse heights e1, e2, e3 and e4 illustrated in FIG. 5according to the method of the third embodiment. In the figure, the samenumerals as those in FIG. 13 denote the same pixels. (1) to (4) in FIG.14 represent gradations in pixels in case of the pulse heights e1, e2,e3 and e4 respectively.

For example, in (1) wherein the pulse heights is e1, pixel A represents6.5th gradation while pixel B represents 6.0th gradation. The areagradation of the area 1701 which contains horizontally adjacent pixels1601 and 1602 and which is surrounded by a dot line is 6.25th gradation.

The area gradation of the area 1702 which contains vertically adjacentpixels and which is surrounded by a dot line is also 6.25th gradation.As a result, the stripes of bright and dark, i.e., 6.5th and 6.0thgradations, become less conspicuous. In (2) wherein the pulse height ise2, all pixels represent 6.5th gradation. In (3) wherein the pulseheight is e3, pixel A represents 6.5th gradation while pixel Brepresents 7.0th gradation, so that the area gradation thereof is 6.75thgradation. In (4) all pixels represent 7.0th gradation.

Fourth Embodiment: FIG. 15 and tables 4 and 5

A fourth embodiment of the invention wherein reference potential groupsare composed of 6 reference potential couples (n=3) will be describedwith reference to tables 4 and 5 and FIG. 15.

Table 4 is a table for explaining pixels to which two dither methods areapplied. In table 4, the upper and lower reference potentials Vt1 andVt1 are common to the first, second and third embodiments, and the upperreference potentials Vt1, Vt5, Vt6, Vt7, Vt8 and Vt9 and the lowerreference potentials Vb1, Vb5, Vb6, Vb7, Vb8 and Vb9 are set to beshifted from the preceding one by 1/6 LSB in this order.

The upper and lower reference potentials Vt1 and Vb1, Vt5 and Vb5, Vt6and Vb6, Vt7 and Vb7, Vt8 and Vb8 and Vt9 and Vb9 make referencepotential couples, each couple being combined by way of "-" in table 4(e.g., Vt1-Vb1).

A signal to be displayed at pixel C is subjected to an A/D conversion bythe reference potential couples Vt1-Vb1, Vt6-Vb6 and Vt8-Vb8 in thefirst, second and third fields respectively and thereafter is subjectedto the dither method. Likewise, a signal to be displayed at pixel D issubjected to an A/D conversion by the reference potential couplesVt5-Vb5, Vt7-Vb7 and Vt9-Vb9 in the first, second and third fieldsrespectively and thereafter is subjected to the dither method.

FIG. 15 is a view for explaining the relation between the switchingpotentials and the pulse heights according to the fourth embodiment,wherein the switching potentials a1 and b1 are the same as those in FIG.5.

In FIG. 15, the switching potentials a5, a6, a7, a8 and a9 correspond tothe switching potentials between the 6th and 7th gradations when thesignal is subjected to an A/D conversion by the reference potentialcouples Vt5-Vb5, Vt6-Vb6, Vt7-Vb7, Vt8-Vb8 and Vt9-Vb9.

a1<e5<a5<e6<a6<e7<a7<e8<a8<e9<a9<e10<b1 is established among the pulseheights e5˜e10.

Table 5 is a table which shows the display states of the pulse heightse5˜e10. Pixel C represents 7th gradation at the pulse height of e5 inthe first field since the pulse height of e5 is higher than thecomparison potential a1 therein and represents 6th gradation in thesecond and third fields since the pulse height of e5 is lower than thecomparison potentials a6 and a8 therein. When the pulse height issubjected to the dither method, the pixel C represents it at 6.33thgradation.

Pixel D represents 6th gradation in the first, second and third fieldssince the pulse height e5 is lower than the comparison potentials a5, a7and a9 therein and represents the 6.00th gradation even if the pulseheight is subjected to the dither method. The area where the pixels Cand D are arranged adjacent to each other is recognized by human eyes at6.17th gradation owing to the effect of the dot area modulation method.

Likewise when the pulse height is e6, the pixels C and D represent thepulse height e6 at the 7th, 6th and 6th gradations in the first, secondand third fields respectively. When pulse height is subjected to thedither method, the pixels C and D represent it at 6.33th gradation andthe area gradation thereof becomes also the 6.33th gradation.

When the pulse height is e7, the pixel C represents it at the 7th, 7thand 6th gradations in the first, second and third fields respectively,while the pixel D represents it at the 7th, 6th and 6th gradations inthe first, second and third fields respectively. When the pulse heightis subjected to the dither method, the pixels C and D represent it at6.67th and 6.33th gradations respectively and the area gradation thereofbecomes 6.50th gradation.

When the pulse height is e8, the pixels C and D represent it at the 7th,7th and 6th gradations in the first, second and third fieldsrespectively. When the pulse height is subjected to the dither method,the pixels represent it at 6.67th gradation and the area gradationthereof becomes 6.67th gradation.

When the pulse height is e9, the pixel C represents it at the 7th, 7thand 7th gradations in the first, second and third fields respectively,while the pixel D represents it at the 7th, 7th and 6th gradations inthe first, second and third fields respectively. When the pulse heightis subjected the dither method, the pixels C and D represent it at7.00th and 6.67th gradations respectively, and the area gradationthereof becomes 6.84th gradation.

When the pulse height is e10, the pixels C and D represent it at the7th, 7th and 7th gradations in the first, second and third fieldsrespectively. When the pulse height is subjected to the dither method,the pixels C and D represent it at 7.00 gradation and the area gradationthereof becomes also 7.00th gradation.

In this way according to the fourth embodiment, 6 reference potentialcouples are divided into two sets, i.e., Vt1-Vb1, Vt6-Vb6 and Vt8-Vb8and Vt5-Vb5, Vt7-Vb7 and Vt9-Vb9 for performing the dither method, so asto triple the number of display gradations.

Moreover, the number of display gradations becomes 6 times as many asthat of original display gradations in total owing to the effect of thedot area modulation method. It is possible to represent 96 gradationssince the 4 - bit A/D converter having the resolution of 16 gradationsis employed. In case of the TV signal of NTSC color system having thefield cycle of 1/60 second, the flicker cycle becomes 1/20 second, whichis the visibility limit, according to this embodiment which requiresthree fields for the dither method.

                  TABLE 1                                                         ______________________________________                                        φ1  φ2        Vrt        Vrb                                          ______________________________________                                        1       0             Vt1        Vb1                                          1       0             Vt3        Vb3                                          0       0             Vt4        Vb4                                          0       1             Vt2        Vb2                                          ______________________________________                                    

                  TABLE 2                                                         ______________________________________                                        PIXEL        FIRST FIELD   SECOND FIELD                                       ______________________________________                                        PIXEL A      Vt1-Vb1       Vt4-Vb4                                            PIXEL B      Vt3-Vb3       Vt2-Vb2                                            ______________________________________                                    

                  TABLE 3                                                         ______________________________________                                        e    PIXEL    1F     2F   DITHER  AREA GRADATION                              ______________________________________                                        e1   A        7      6    6.5     6.25                                             B        6      6    6.0                                                 e2   A        7      6    6.5     6.5                                              B        6      7    6.5                                                 e3   A        7      6    6.5     6.75                                             B        7      7    7.0                                                 e4   A        7      7    7.0     7.0                                              B        7      7    7.0                                                 ______________________________________                                    

                  TABLE 4                                                         ______________________________________                                        PIXEL   FIRST FIELD SECOND FIELD THIRD FIELD                                  ______________________________________                                        PIXEL C Vt1-Vb1     Vt6-Vb6      Vt8-Vb8                                      PIXEL D Vt5-Vb5     Vt7-Vb7      Vt9-Vb9                                      ______________________________________                                    

                  TABLE 5                                                         ______________________________________                                        e    PIXEL   1F     2F   3F   DITHER AREA GRADATION                           ______________________________________                                        e5   C       7      6    6    6.33   6.17                                          D       6      6    6    6.00                                            e6   C       7      6    6    6.33   6.33                                          D       7      6    6    6.33                                            e7   C       7      7    6    6.67   6.50                                          D       7      6    6    6.33                                            e8   C       7      7    6    6.67   6.67                                          D       7      7    6    6.67                                            e9   C       7      7    7    7.00   6.84                                          D       7      7    6    6.67                                            e10  C       7      7    7    7.00   7.00                                          D       7      7    7    7.00                                            ______________________________________                                    

According to the LCD driving method of the invention, a small-scale A/Dconverter subjects a pixel to the dither method using a half of aplurality of reference potential couples and a pixel adjacent thereto tothe dither method using the remaining half of the reference potentialcouples. As a result, the dither cycle can be shortened so that theflicker disturbance is prevented and the dot area modulation methodtakes effect, and consequently it is possible to realize amulti-gradation display owing to the multiple effect of the dithermethod and dot area modulation method to increase the number ofgradations so as to enable a display of high quality in which thequantization noise is ignorable.

It is useful as a driving method of various liquid crystal displays usedin a liquid crystal TV, office automation instruments, etc.

What is claimed is:
 1. A method of driving an LCD which is equipped withan A/D converter and a liquid crystal panel and which converts an imagedisplay signal into a quantized display data by said A/D converteraccording to reference potentials, applies signal electrode drivingsignals to said signal electrodes of said liquid crystal panel based onsaid display data and successively selects the scanning electrodes ofsaid liquid crystal panel so as to display said display data on saidliquid crystal panel comprises the steps of:generating a plurality ofreference potential groups which each output a plurality of referencepotential couples wherein the reference potentials of each referencepotential group are set to be different from those of other referencepotential groups; selecting said reference potential groups in eachfield at a given cycle; selecting the reference potential couple of saidselected reference potential group in each field at a given cycle ateach scanning electrode of said liquid crystal panel or at each samplingcycle of said A/D converter; and subjecting said selected referencepotential couple to an A/D conversion so as to display said display dataon said liquid crystal panel.
 2. A method of driving an LCD which isequipped with an A/D converter and a liquid crystal panel and whichconverts an image display signal into a quantized display data by saidA/D converter according to reference potentials, applies signalelectrode driving signals to said signal electrodes of said liquidcrystal panel based on said display data and successively selects thescanning electrodes of said liquid crystal panel so as to display saiddisplay data on said liquid crystal panel comprises the stepsof:generating a plurality of reference potential groups which eachoutput a plurality of reference potential couples wherein the referencepotentials of each reference potential group are set to be differentfrom those of other reference potential groups, selecting said referencepotential groups in each field at a given cycle, selecting the referencepotential couple of said selected reference potential group in eachfield at each sampling cycle of said A/D converter, selecting saidreference potentials by shifting said sampling cycle from correspondingreference potentials by a cycle with regard to each scanning electrodeof said liquid crystal panel and subjecting the voltage of said selectedreference potential couple to an A/D conversion so as to display saiddisplay data on a liquid crystal panel.